PRÁCTICAS LÓGICA DIGITAL Trabajo previo: Práctica 1 b) Dibuja el circuito de las funciones mínimas obtenidas en ambos problemas utilizando solo compuertas NOR en el caso 1 y compuertas NAND para el segundo. COMPUERTAS NOT y NAND. COMPUERTAS XOR y NOR. _. CIRCUITOS INTEGRADOS DIGITALES. _. Z = (A. B). (A. B). _. Figura Circuito equivalente de una compuerta NOR. Figura La operación de una puerta NOR es análoga a la del circuito eléctrico mostrado en la fig.
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PRÁCTICAS Lógica Digital by Sandra AR on Prezi
Dual 4-bit Decade Counter. Hex 2-input AND Drivers. Programmable read-only memory with Open Collector Outputs. Octal D-Type Flip-Flop Single 2 Input NOR gate. Dual 4-Bit Bistable Latch.
Synchronous 4-bit Decade Counter with Synchronous Clear. Quad 2-input AND gate.

Dual 4-input NAND gate. ExcessGray code to Circutos Decoder. Dual 4-Input NOR gate Fuse Programmable Identity Comparator, 12 Bit Dual 4-input NOR gate with Strobe.
Dual 4 Bit Decade Counters.
Digital Phase-Locked-Loop Filter Quad 2-input NOR gate. Hex Delay Elements Decade Counter separate divide-by-2 and divide-by-5 sections Dual 1 of 4 Decoder with Three-State Outputs Synchronous 4-bit Binary Counter with Synchronous Clear.
Serie 4000
Octal Bus Transceiver with Parity, Noninverting Synchronous 4-bit Decade Counter with Synchronous Clear Triple 3-input OR gate. Triple 3-input AND gate Hex Schmitt Trigger Inverter Hex Inverter with Open Collector Outputs. Shift Register with Input Latches.
Quad 2-Input XOR gate Quad Complementary Output Elements Decade Counter separate Divide-by-2 and Divide-by-5 sections Single 2 Input NOR gate Dual 4-bit Decade Counter Fuse Programmable Identity Comparator, 12 Bit. Single 3-Input NOR gate.
Dual 4-bit Addressable Latch. Bus Transfer Switch Fuse Programmable Identity Comparator, 16 Bit.
